Highly integrated 1553B cable test system

As the data bus of current aerospace electronic equipment, the reliability of the 1553B bus cable network directly affects the normal operation of the entire system, and bus failures may even cause unpredictable losses. Therefore, the production and processing of the cable network, system assembly, use and maintenance, etc. The detection of each link is the basic guarantee for the reliability of the entire system using the 1553B bus.

1 Demand analysis

The comprehensive test of the traditional 1553B cable network performance parameters, including static electrical performance test, dynamic signal waveform test, requires the use of multimeter, characteristic impedance analyzer, oscilloscope, signal generator, insulation withstand voltage tester and other equipment, the whole test process It is very cumbersome, requires high testers, takes a long time, and is extremely inefficient. A highly integrated system is an intelligent test system that integrates the above-mentioned instrumentation functions. The entire process is completed automatically without manual intervention, and a detailed test analysis is finally formed, which can greatly improve test efficiency and reliability.

2 Overall design plan

In order to be able to adapt to the test site of the internal and external fields and the convenience of transportation, the system adopts an integrated portable chassis structure, and the system block diagram is shown in Figure 1. The system mainly includes the main control processing unit of the system, the dedicated unit for 1553B bus test, the measurement acquisition module, and the test interface unit.

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Figure 1 Composition of a highly integrated 1553B system

The main control unit adopts an embedded tablet computer, and its rich peripherals can meet the requirements of expanding various system modules, and it can be installed with Windows XP operating system. The 1553B bus test dedicated unit is based on FPGA design. The main board control processor and the 1553B bus controller for network testing are all integrated inside the FPGA, with high integration and small size, meeting the requirements of portable design, realizing signal excitation source and 1553B protocol communication. The data acquisition module adopts a USB-based meter, which is responsible for the acquisition of data signals on the bus and the measurement of the physical performance of the bus, which are transmitted to the main control unit for analysis and processing. The test interface unit can realize the relay matrix module connected to the tested network, and is a bridge between the cable and the bus test dedicated unit.

2 Hardware design

2.1 Main control unit

The main control unit adopts an embedded industrial-grade tablet computer, equipped with a touch LCD screen, can install Windows XP operating system, and has multiple USB, RS232, WLAN interfaces, which provide conditions for the design of a friendly human-computer interaction interface.

2.2 Measurement acquisition unit

The measurement acquisition unit uses a measurement acquisition module based on the USB interface, in which a USB-type digital oscilloscope and a USB-type digital multimeter module have been fixedly embedded inside, and the external USB or serial communication test equipment can be expanded according to the demand, such as insulation resistance test Instrument, dielectric withstand voltage tester, etc. Among them, the digital oscilloscope has the following performance, bandwidth 200MHz, sampling rate up to 1 GS/s; supports 2-channel input; memory depth is 32Mpts; vertical resolution is 8 bits; compact portable structure; input CAT 130Vrms, 42Vpk. The digital multimeter has the following performance, the resolution digit is 6 and a half, 2-wire or 4-wire resistance measurement, and the measurement range is 0-10MΩ.

2.3 Bus test unit

The bus test unit is based on FPGA design, and the principle block diagram of the main board is shown in Figure 2. The main board of the bus test unit is equipped with a large-capacity FPGA, which is embedded with Obit Corporation’s highly reliable embedded processor S698 IP core as the main control SOC. At the same time, it integrates 1553B for cable network testing and terminal equipment function testing. The bus controller, together with the peripheral interface module, realizes the functions of USB interface, RS232 interface, 1553B cable network test control module and 1553B terminal equipment control module. Its S698 IP core is a cut-down core based on the AMBA bus architecture with abundant peripherals and features as follows:

● With IU/FPU unit, support 5-level pipeline;

● With a memory controller, it can be connected to SRAM /PROM/SDRAM;

● With interrupt controller;

● With 2 UART serial ports;

● With 2 internal timers;

● With GPIO interface;

1553B bus controller IP core is a bus controller module that complies with MIL -STD -1553B protocol developed by Orbit Company specially for equipment in aviation and aerospace measurement and control network. The module implements a 1553B bus protocol processor and a bus data transceiver, which can complete the functions of three bus devices: bus controller, remote terminal and bus monitor. The 1553B core used here integrates the functions of two OBT1553Bs to realize a bus controller with independent two-way 1553B functions. At the same time, the kernel has a built-in 32K X 16Bit static memory, and the static memory capacity can be modified as needed.

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Figure 2 Block diagram of the bus test unit

2.3 Test interface unit

The test interface unit is a relay-based, RS232 communication-based link switching matrix. Due to the multiple test functions and test links, an FPGA with more I/O port resources is used as the main control chip. The relay matrix is shown in Figure 3. Show.

In order to ensure the signal quality, the magnetic latching relay is selected in the design of this unit. While matching the impedance, it takes into account the safety distance required for the insulation withstand voltage test so that the entire system's own DC 1000V insulation resistance reaches 100MΩ or more, and the AC 500V leakage current is less than 0.02 mA.

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Figure 3 Block diagram of the test interface unit

3 Software design

In order to ensure the reliability, scalability and maintenance of the software, this software adopts the design incremental model for software engineering development. After the requirements are clarified, each component module is gradually incorporated into the existing software architecture. The system software mainly includes user management module, parameter configuration module, function test module, report statistics and analysis module, unattended test module, bottom driver module, waveform analysis and playback module. The overall block diagram of the software is shown in Figure 4.

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Figure 4 System software block diagram

The test system adopts Chinese interface software. The software platform has the following functions and features:

A) Friendly human-computer interaction interface: The software system is simple to operate, easy to learn, easy to master, beautiful interface, and comfortable to operate;

B) Complete test control: Various test conditions can be set according to the test requirements. For complex settings, the system will give operation step guides or prompts;

C) Real-time test monitoring: The system collects test data in real time, and displays it in numbers, text, curves, graphics, etc. according to requirements (the conduction and isolation performance needs to record the measured value; the network performance test needs to save the oscilloscope picture);

D) Unified data management: The system can record and save all test data, has a data analysis function, and can generate tests based on the analysis results and print them out; data reports can also be viewed and analyzed during the test process;

E) Test control: automatic test can be carried out, and a single-step test formulated for the tested communication network can also be completed according to the user's setting. The test items can be deleted according to the actual production situation. When the tested object is unqualified, directly locate the point of the bus fault. And according to the specific structure and performance parameters of the tested object, the product's qualified judgment index range can be set, and the equipment test value can be automatically compared and judged, and a conclusion can be given;

F) Test playback management: The system can replay the saved test data on the software system, and the playback data can also be displayed in numbers, text, curves, etc.;

G) It has the function of executing timed tests according to user definitions, or unattended tests according to task schedules.

4 Conclusion

This article describes a highly integrated and intelligent 1553B cable test system, which can verify the rationality of the 1553B bus cable network topology and production process, and can fully verify whether the tested bus cable meets GJB 289A -9 Or the requirements of MIL-STD-1553B-1996. The system is not limited to the place of origin, and is highly integrated, with multiple expandable functions, and can meet all the testing requirements for the production and maintenance of 1553B bus cables. At present, the system has been applied, and its reliability and efficiency have been fully verified.

  references:

Extracted documents in the essays

[1] GJB5186.5-2004 digital time division system command/response multiplex data bus test method[S] .2004.

[2] GJB298A-97 digital time division system command/response multiplex data bus[S] .1997.