Interpretation of the diode surge current test circuit

This article describes the basic requirements and standard test methods for diode forward surge current testing. Aiming at the shortcomings of standard test methods, the design and implementation of a circuit solution using signal control, capacitor energy storage and high-power FET transistor current drive , It realizes the test of diode forward surge current concisely and efficiently.

    Generation of sine half-wave pulse current

    There are many specifications of diodes. The common rated on-state current ranges from hundreds of milliamps to hundreds of amperes or even higher. The peak pulse current required for IFSM testing requires dozens of times the rated on-state current value. The standard test method is to use a large-capacity power frequency transformer to intercept the AC waveform of the mains to generate a sine half-wave pulse with a time constant of 10ms and a conduction angle of 0°～180°, as shown in Figure 1.



    Using this method to generate sinusoidal pulse currents of hundreds of thousands of amperes, the volume and weight of the transformers used are very considerable, and it is very inconvenient to install and use. Some foreign companies’ products have special requirements for surge current waveforms. For example, it is required to add a sine half-wave pulse with a time constant of 10ms or 8.3ms and a conduction angle of 0°～180° on the basis of the forward rectification current. Current, or it is required to apply two consecutive half-wave sine pulse currents with a time constant of 10ms or 8.3ms and a conduction angle of 0°～180°. Obviously, it is difficult to meet the test requirements of different devices by adopting the method of mains interception.

    Design ideas

    The high-power FET transistor is a standard voltage-controlled current device. In the linear working area of the VDMOS tube, the drain current is controlled by the gate voltage: IDS=GFS*VGS [2]. The required voltage waveform is applied to the gate, and the corresponding current waveform is output at the drain. Therefore, the choice of high-power VDMOS tube is suitable for realizing the required surge current waveform, and the circuit form is shown in Figure 2.



    The op amp constitutes a basic reverse operation circuit, which drives the gate of the VDMOS tube. The drain-source current is added to the reverse input terminal of the op amp through the source sampling resistor of the VDMOS tube, and added to the input waveform to form feedback. The output voltage of the op amp is controlled. The gate voltage VGS of the VDMOS tube controls the drain output current IDS [3]. This IDS is the forward surge current applied to the diode under test (DUT).

    The power and current amplification capability of a single VDMOS tube is limited, and cannot reach the output current capability of thousands of amperes. Using multiple parallel connections can solve this problem to achieve the required peak current. The common connection method is shown in Figure 3.



    This test plan adopts mature circuit control technology, concisely and effectively realizes the requirements of various surge impact tests. All conventional and easily available components are used, and the assembled device is small in size and light in weight, and can be easily installed in an ordinary instrument box to become a standard test instrument. It has the characteristics of flexible use, easy operation, high test accuracy, safety and reliability.